Top Picks in Hardware and Embedded Security
7th November 2019, Westminster, CO, United States
Aim and Scope:
The top picks will be selected from conference and journal papers that have appeared in leading hardware security conferences including but not limited to DAC, DATE, ICCAD, HOST, VLSI Design, CHES, ETS, VTS, ITC, IEEE S&P, Euro S&P, Usenix Security, ASIA CCS, NDSS, ISCA, HASP, MICRO, ASPLOS, HPCA, ACSAC and ACM CCS. The top picks will appear in an IEEE Design and Test special section on “Top Picks in Hardware and Embedded Security".
To reiterate, top picks will span a gamut of topics in hardware, microarchitecture, and embedded security from leading conferences. Shortlist of papers are invited to the “Top Picks” workshop, collocated with ICCAD 2019. Authors are required to present the paper at the workshop. This is mandatory for consideration to be a top pick. Selected papers are then invited for submission to the Top-picks special issue.
Eligibility:
Any paper (conference or journal) in the broad area of hardware and embedded security that was published during the six-year period: 1/1/2013- 12/31/2018.
Download the call for paper here
Important Dates:
Submissions Deadline September 12, 2019 EXTENDED September 18, 2019
Author Notification October 2, 2019
Presentation @ the Top Picks Workshop (Mandatory for consideration to be a Top Pick) November 7, 2019
Announce Top picks December 1, 2019
Top-picks issue in IEEE Design and Test 15th May 2020